Study of ReRAM Neuromorphic Circuit Inference Accuracy Robustness using DTCO Simulation Framework

Publication Date


Document Type

Conference Proceeding

Publication Title

2021 IEEE Workshop on Microelectronics and Electron Devices (WMED)




A Design-Technology Co-Optimization (DTCO) framework is constructed to study the algorithm-circuit-device interaction for optimizing emerging memory-based neuromorphic computing circuits. The framework consists of 3 parts, namely, software level machine learning to perform machine learning calculation as a benchmark or for off-line training purpose, generation of emerging memory Verilog-A model based on experimental or physical simulation data, and automatic SPICE neuromorphic circuit simulations and simulation result analysis. A python-based wrapper is constructed to link the 3 parts to automate the task and improve usability and flexibility. In this paper, the effect of current comparator input impedance, operation temperature, and input voltage range on the accuracy of ReRAM based neuromorphic inference circuit (a neural network) for digit image recognition is studied. The training is done off-line using software machine learning. The neural network with an input layer of 64 neurons, the hidden layer (1, 3 or 5 layers) with 8 neurons and an output layer of 10 neurons was trained using 1800 hand-written digit images. ReRAM neuromorphic circuit for inference is constructed automatically with the training weights being transformed into gap sizes in ReRAM for circuit simulations. 180 unseen digit images are used to test the robustness of its inference accuracy. It is found that a deeper neural network has worse robustness in inference accuracy while non-zero current comparator input impedance makes the neuromorphic circuit more robust.

Funding Sponsor

San José State University


Circuit Simulation, DTCO, Machine Learning, Neuromorphic, ReRAM, Verilog-A


Electrical Engineering