Publication Date
8-12-2021
Document Type
Conference Proceeding
Publication Title
Journal of Physics: Conference Series
Volume
1993
Issue
1
DOI
10.1088/1742-6596/1993/1/012008
Abstract
Architecture of bridge model between AXI Lite and AHB for this paper were simulated using Synopsys VCS and DC in Verilog HDL. Bridge structure mainly comprises of arbitration techniques, control signals, multiplexing techniques for writing data signals and Decoder for reading data section. In this work, bridge model between AHB and AXI lite was simulated and characterized. The proposed model of bridge design provides efficient communication between on chip bus protocols like AXI and AHB on chip in the era of deep sub-micron technology where channel side is reduced as much as 5 nm.
Creative Commons License
This work is licensed under a Creative Commons Attribution 4.0 License.
Department
Electrical Engineering
Recommended Citation
Jaymin Patel, Yash Shah, and Lili He. "Bridge Design between AXI Lite and AHB Bus Protocol" Journal of Physics: Conference Series (2021). https://doi.org/10.1088/1742-6596/1993/1/012008
Comments
This is the Version of Record and can also be found online here.