A Multi-Memory Field-Programmable Custom Computing Machine for Accelerating Compute-Intensive Applications

Publication Date

1-1-2021

Document Type

Conference Proceeding

Publication Title

2021 IEEE 12th Annual Ubiquitous Computing, Electronics and Mobile Communication Conference, UEMCON 2021

DOI

10.1109/UEMCON53757.2021.9666601

First Page

619

Last Page

628

Abstract

In this paper, we present an FPGA-based multi-memory controller for accelerating computationally intensive applications. Our architecture accepts multiple inputs and produces multiple outputs for each clock cycle. The architecture includes processor cores with pipelined functional units tailored for each application. Additionally, we present an approach to achieve one to two orders-of-magnitude speedup over a traditional software implementation executing on a conventional multi-core processor. Even though the clock frequency of the Field-Programmable Custom Computing Machine (FCCM) is an order-of-magnitude slower than a conventional multi-core processor, the FCCM is significantly faster. We used the Power function as an application to demonstrate the merits of our FCCM. In our experiments, we executed the Power function in software and compared the software execution times with the execution time of an FCCM. Additionally, we also compared FCCM execution time with the OpenMP implementation of the function. Our experiments show that the results obtained using our multi-memory architecture are 57X faster than software implementation and 17X faster than OpenMP implementation executing the Power function, respectively.

Funding Number

W911NF1810445 978-1-6654-0690-1/21

Funding Sponsor

U.S. Department of Defense

Keywords

Field-Programmable Custom Computing Machines, Field-Programmable Gate Arrays, High Performance Computing, Multi-Memory Architecture, Multiple Memory Banks, Reconfigurable Computing

Department

Electrical Engineering

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