Publication Date
Spring 1996
Degree Type
Master's Project
Degree Name
Master of Science in Engineering (MSE)
Department
General Engineering
First Advisor
Dr. Albert Hu
Abstract
Plasma aided processing of the semiconductor wafer has evolved as the state of the art technology for the fabrication of VLSI and ULSI circuits. However, during these plasma aided processes the substrate temperature tends to increase due to high energy ion bombardment. The temperature control of the substrate (wafer) during the process and the particulate control inside the process chamber have become the main challenges for the next generation of 0.25 pm and below fabrication technology. New techniques are being developed to control the wafer temperature and keep the process chamber free from any source contributes to particle generation. One of such techniques is the electrostatic clamping of the wafer during the process.
The subject of this study is to describe the theoretical base for electrostatic clamping, design features, and materials of an electrostatic chuck as applied to the wafer holding in plasma aided processing. Further, a typical design of an electrostatic chuck has been investigated by using new materials and a multi-layered composite structure to improve the temperature control of the wafer, reliability and its lifetime.
Recommended Citation
Dhindsa, Rajinder, "Electrostatic Clamping of the Substrate (Wafer) in Plasma Aided Semiconductor Processing" (1996). Master's Projects. 1709.
https://scholarworks.sjsu.edu/etd_projects/1709
