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Publication Date

Spring 2014

Degree Type

Thesis - Campus Access Only

Degree Name

Master of Science (MS)


Electrical Engineering


Shahab Ardalan

Subject Areas

Electrical engineering


Increasing data requirements have created a frequency shortage that has led to a wider spectrum being used for wireless data transmission. In a transceiver, analog-to-digital converters are rate-limiting steps that require a radio frequency filter in the front end design to operate effectively. Data converters with high bandwidths can eliminate front end filters and provide a power and cost-efficient solution. Data transmission is done digitally and modulated and demodulated via software. This thesis explored the design of high speed, low power data converters for software-defined radio applications.

Data converter architectures were considered in detail before selecting a binary search method with capacitor-based digital to analog converters. This architecture was chosen due to its intrinsic compatibility with the short channel manufacturing process. The final design was adaptable to smaller nodes in next generation manufacturing processes.

A full system-level model was included with transistor-level implementation for the front end track and hold and comparator. The groundwork was set for future work on a complete design that features time interleaving. System-level analysis was performed on a variety of nonidealities, and correction schemes were proposed. A high speed, low power data converter was designed for software-defined radio applications.