TCAD modeling for reliability

Publication Date

9-1-2018

Document Type

Conference Proceeding

Publication Title

Microelectronics Reliability

Volume

88-90

Issue

SI: 29th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis

DOI

10.1016/j.microrel.2018.06.109

First Page

1083

Last Page

1089

Abstract

Technology Computer Aided Design (TCAD) tools can be used to effectively study and analyze a multitude of reliability issues in semiconductor devices. In the following article, we first describe Negative-Bias Temperature Instability (NBTI), which is one of the most severe reliability issues. Using the Reaction-Diffusion (RD) model for simulating the NBTI effect, we show that the simulated threshold voltage degradation agrees well with measured data. Based on the simulation results, we propose an on-chip heater to enhance recovery and revert the NBTI degradation. Next, we discuss how to apply the Hot-Carrier Stress (HCS) model to analyze hot carrier degradation in FinFET. We show that the threshold voltage shift agrees well with experiment and use the HCS model for the simulation of breakdown voltage walkout in a LDMOS transistor. Then, we apply process emulation to better understand modern DRAM structures and illustrate the row hammering reliability issue. Finally, we demonstrate a multi-level sub-modeling methodology for chip to package interaction (CPI) and apply the method to study the effect of wafer bending on the reliability of re-distribution layers (RDL).

Keywords

BV walkout, CPI, DRAM, Hot carrier degradation, NBTI, RDL, Row hammer, Thermo-mechanical stress

Department

Electrical Engineering

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