Four-Bits-Per-Memory One-Transistor-and-Eight-Resistive-Random-Access-Memory (1T8R) Array
Publication Date
3-1-2021
Document Type
Article
Publication Title
IEEE Electron Device Letters
Volume
42
Issue
3
DOI
10.1109/LED.2021.3055017
First Page
335
Last Page
338
Abstract
We demonstrate a 1MBit array of 1-Transistor-8-Resistive RAM (1T8R) memory fabricated using a foundry logic technology. Using a gradual SET/RESET programming scheme, sixteen conductance levels are stored in each RRAM, achieving 1T8R array with 4 bits per RRAM. We report SET/RESET endurance of 100K cycles and 10-year retention at 110°C.
Funding Number
1092636E008007
Funding Sponsor
Defense Advanced Research Projects Agency
Keywords
1T8R, 4-bits-per-RRAM, gradual-SET/RESET, RRAM
Department
Electrical Engineering
Recommended Citation
E. R. Hsieh, X. Zheng, B. Q. Le, Y. C. Shih, R. M. Radway, M. Nelson, S. Mitra, and S. Wong. "Four-Bits-Per-Memory One-Transistor-and-Eight-Resistive-Random-Access-Memory (1T8R) Array" IEEE Electron Device Letters (2021): 335-338. https://doi.org/10.1109/LED.2021.3055017
