Design and Analysis of an FPGA-based CNN for Exercise Recognition
Publication Date
1-1-2023
Document Type
Conference Proceeding
Publication Title
Proceedings - 2023 TRON Symposium, TRONSHOW 2023
Abstract
In this paper, we describe the design and analysis of an FPGA-based exercise detector, and show the improvement in performance of an FPGA-based over a GPU-based human action recognition application. Using the Xilinx Kria KV260 development board and a USB webcam, the pose of a person is tracked to determine what kind of exercise they are doing. OpenPose is used to obtain the coordinates of a person's body parts. Using Vitis AI and Tensorflow, multiple neural networks to identify different exercises were designed using a sequence of the coordinates as an input. These models have different input sizes and number of convolutional layers. These neural network models were run directly on the programmable logic (Zynq UltraScale+ MPSoC FPGA) of the Kria board, and their performance in frames per second (FPS) was analyzed. Our simulation results show that the FPGA's performance based on a relatively simple CNN reached 372 to 722 FPS while the ResNet-based GPU (Jetson Nano) performance was 32 FPS, for which the accuracy degradation is less than 10%.
Keywords
artificial intelligence, convolutional neural network, FPGA, human action recognition
Department
Electrical Engineering
Recommended Citation
Derrick Trinh, Jonathan Ouyang, and Chang Charles Choo. "Design and Analysis of an FPGA-based CNN for Exercise Recognition" Proceedings - 2023 TRON Symposium, TRONSHOW 2023 (2023).
