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Publication Date
Spring 2011
Degree Type
Thesis - Campus Access Only
Degree Name
Master of Science (MS)
Department
Electrical Engineering
Advisor
Sotoudeh Hamedi-Hagh
Keywords
CMOS, Fully Differential, Low Voltage, Rail to Rail, Variable Gain Amplifier, VGA
Subject Areas
Electrical Engineering; Engineering
Abstract
This research presents a low voltage (0.8 V) fully differential CMOS variable gain amplifier. SPECTRE simulations on the designed amplifier show a -17 dB to 20 dB gain variation in 1 dB steps, with a mean gain error of 0.0714 dB. SPECTRE simulations also reveal a 1 dB compression point of -15.3 dBm and 3rd order input intercept point of -1.38 dBm at a gain of -17 dB. The entire variable gain amplifier consumes a maximum of 40 µW of power at the highest gain. The proposed configuration has rail-to-rail input common mode range and a class AB output stage to maximize signal swing. The variable gain amplifier is shown to be highly robust against process, temperature, and input common mode voltage variations and is designed using a 45nm standard CMOS process.
Recommended Citation
Siddiqui, Muhammad Yousuf, "A Low Power, Low Voltage, Fully Differential CMOS Variable Gain Amplifier" (2011). Master's Theses. 3953.
DOI: https://doi.org/10.31979/etd.xgyu-wm5e
https://scholarworks.sjsu.edu/etd_theses/3953