Publication Date
Spring 2013
Degree Type
Thesis
Degree Name
Master of Science (MS)
Department
Electrical Engineering
Advisor
Shahab Ardalan
Keywords
Circuit Design, Coaxial Cable, Equalizer, Low Voltage, System Level Model, Video Application
Subject Areas
Electrical engineering
Abstract
A new method of modeling coaxial cable frequency response with genetic algorithm was introduced. A system-level multi-stages adaptive equalizer model with QFB block was generated and tested with multiple cable models, pathological PRBS-23 data with data rate 1.5 GHz was used. This thesis also provided analysis of influences on output by using different parameters in simulations. Two adaptive equalizer circuits with different pre-amplifiers were implemented in GPDK 45 nm CMOS technology. Related simulations about adaptive ability, single stage compensation ability, and cascade stages compensation ability were completed. A tradeoff between output eye height and peak-to-peak jitter was discussed based on different simulations. Future work will be digital control circuit implementation, entire circuit fabrication, and testing.
Recommended Citation
Zhang, Han, "System Level Modeling and Circuit Design for Low Voltage CMOS Equalizer for Coaxial Cable for Video Application" (2013). Master's Theses. 4325.
DOI: https://doi.org/10.31979/etd.bd7q-3bja
https://scholarworks.sjsu.edu/etd_theses/4325
