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Publication Date

Fall 2019

Degree Type

Thesis - Campus Access Only

Degree Name

Master of Science (MS)


Computer Engineering


Hyeran Jeon


Cluster tool, Deep Learning, Machine Learning, Scheduling Parameter Prediction, Semiconductor Wafer Fabrication, Throughput Prediction

Subject Areas

Computer engineering; Electrical engineering


The semiconductor industry utilizes cluster tools with multiple processing modules and robotic arms to manufacture semiconductor wafers. The complexity of the cluster tool increases with the increase in the number of processing modules. In a cluster tool, having the optimum sequence of processing steps is extremely necessary as it impacts the throughput. The currently used simple rule-based scheduler operates on rigid rules and hence does not have the most optimum sequence of processing steps. The goal of the thesis is two-fold: first, to be able to predict an accurate throughput for a given configuration of the cluster tool, and second, to find the best scheduling parameters to produce the most optimum sequence of steps. This will lead to better throughput prediction and optimization. The models built accommodate different run-time dynamics and diverse cluster tool configurations. The proposed models predict a likely throughput rather than the worst or the best throughput boundaries for a given configuration. The evaluation of the models indicates that deep learning algorithms are better than the machine learning algorithms for scheduling parameter prediction. The error rates of the throughput prediction models are between 3 to 5 wafers per hour, which is a variance of less than 5% from the actual throughput. The results of the scheduling parameter prediction models vary by 2 to 3 seconds when compared to the actual value. In conclusion, these results are of industrial standards and prove to be efficient.