Publication Date

Fall 2025

Degree Type

Thesis

Degree Name

Master of Science (MS)

Department

Electrical Engineering

Advisor

Hiu Yung Wong; Reza Arghavani; Shrikant Jadhav

Abstract

Radiation, such as alpha particles or neutrons, is hard to control and can come from sources such as trace impurities or cosmic rays from space. These can then strike a semiconductor device, such as a Static Random Access Memory (SRAM) cell, and cause the SRAM to have its bit flipped. This bit flip is often just a temporary effect and is thus called a single event upset (SEU). Although it is temporary, a bit flip can cause severe consequences, such as affecting program functionality by causing incorrect data to be used. This is made worse in critical environments that need extremely high reliability, such as in space where fixing issues can be of significant costs. SRAMs are made of transistors. Transistors have been continuously scaled since their introduction in order to improve performance and increase density. This increase in density allows SRAMs to be denser and store more information per unit area. However, an increase in density also has made the charge that represents a bit to be decreased, which makes it more susceptible to radiation. In the literature, radiation hardness of SRAM devices has been studied in the literature on older process nodes. However, there has been a lack of studies on the latest process nodes, such as the 3nm node, as well as comparisons between architectures, such as Fin Field-Effect-Transistors (FinFET) and Gate-All-Around Field-Effect-Transistors (GAA-FET). This thesis will use Technology Computer-Aided Design (TCAD) simulation to address radiation hardness of the 3nm process node through comparison of FinFET-based SRAMs and GAA-FET-based SRAMs.

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