Publication Date

Spring 2026

Degree Type

Thesis

Degree Name

Master of Science (MS)

Department

Computer Engineering

Advisor

Rafael Kaliski; Jahan Ghofraniha; Jun Liu

Abstract

The Instruction Set Architecture of a CPU (Central Processing Unit) determines what type of instructions the CPU is able to understand, how those instructions are encoded, and what it should output upon receiving those instructions as input. There are currently three popular ISAs meant for the consumer market: x86, RISC-V, and ARM, as well as a fourth that mostly now exists in the server market by the name of Power. One of the most important parts of an ISA is for engineers to be able to understand it and make use of it. If an ISA is too complicated, nobody will be able to effectively write programs for it or implement it either in simulation or in hardware. All four of these ISAs have problems with their encoding that complicate their understanding, especially when it comes to developing hardware to adhere to their specifications and writing machine code for them (either through compilers and assemblers or when written by hand). The Zeal ISA demonstrates a simpler and more effective method of encoding for both machines and people alike.

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